Vinay Sharma

Embedded Systems & Firmware Engineer

Embedded Systems & Firmware Engineer passionate about the intersection of hardware and software. Recently graduated with a degree in B.Tech -ECE from VIT Chennai, with hands-on experience in microcontroller programming, sensor integration, and RTOS. Eager to contribute to teams building reliable, real-time systems.

As an ECE Intern at Mafkin Robotics, I debugged and integrated complex sensor suites and communication interfaces on microcontrollers. I worked directly with the systems team to reduce hardware integration latency, cutting diagnostic cycles by ~25% and test failure rates by ~20%.

I specialize in writing register-level driver code, utilizing real-time operating systems (FreeRTOS) for multitasking firmware, and designing synthesizable RTL on FPGAs. I excel at bridging hardware protocols (UART, SPI, I²C, CAN) with high-reliability data streams.

I favour robust architectures and clean code — Systems built to be maintained, not just shipped.

UART Console Telemetry

vinay@firmware-shell:~$ uart0_telemetry
Vinay Embedded Shell v1.1.0 telemetry buffers ready.
MCU Targets: ESP32 SoC & FPGA RTL cores | Shell Protocol: UART0
Type 'help'to query active registers.
>

What you get

Firmware & RTOS

Bare-metal C/C++ microcontroller programming, deterministic FreeRTOS setups, task prioritization, semaphores, and DMA-driven peripheral controls.

Protocols & Telemetry

Stable communication links utilizing UART, SPI, I²C, and CAN. IoT connectivity with MQTT for wireless telemetry streams.

Digital Design & RTL

RTL coding in SystemVerilog, FPGA verification on Intel Cyclone, ModelSim testbench simulation, and fixing timing violations.

Hardware Debugging

Logic analyzer diagnostics, oscilloscope waveform measurements, hardware-in-the-loop sensor calibration, and PCB tracing checks.

JKW Innovatics Pvt. Ltd. Current Jul 2026 - Present · Kasna, Greater Noida, UP, IN
Graduate Engineer Trainee (R&D) Robotics & Firmware

Full-time Graduate Engineer Trainee in the R&D division working on futuristic warehouse automation robots. Contributing to embedded firmware pipelines, real-time control systems, and sensor integration for autonomous material handling platforms.

Warehouse Robot Firmware

Developing embedded firmware for autonomous warehouse robots, focusing on motion control, sensor fusion, and real-time decision-making algorithms for safe and efficient material handling.

R&D Integration

Working on next-generation robotics platforms, contributing to firmware optimization, hardware integration, and telemetry systems for autonomous warehouse operations.

R&D
Division Focus
Contributing to cutting-edge warehouse automation and futuristic robotics development.
Mafkin Robotics Intern Oct 2024 - Jan 2025 • Chennai,TN,IN
Embedded Systems Intern Firmware & Hardware

Debugged and integrated embedded subsystems (microcontroller firmware, sensors, and communication interfaces) for robotics platforms. Cut diagnostic loops and optimized code routines directly in cooperation with lead hardware engineers.

Sub-System Debugging

Integrated sensor arrays (IMUs, LiDAR) over SPI and I²C protocols. Analyzed oscilloscope and logic analyzer waveforms to isolate signaling delays.

Firmware Optimization

Wrote register-level configuration drivers in C and optimized interrupt handlers, decreasing scheduler jitter and data collection overhead.

~25%
Tuning Diagnostics
Resolved timing anomalies between physical sensor nodes and MCU sub-controllers.
~20%
Test Reliability
Stabilized driver routines to reduce communication lockups under stress tests.
VIT Chennai 2022 - 2026 • Chennai,TN, IN
B.Tech - Electronics and Communication Engineering Academic Core

Focused coursework on embedded processor architecture, RTOS multitasking logic, synthesizable digital VLSI design, and real-time DSP filters.

Digital RTL VLSI Design

Designed synthesizable hardware cores in SystemVerilog, verified timing, and resolved CDC (clock-domain crossing) issues.

Multitasking Operating Systems

Applied FreeRTOS task synchronization APIs (mutexes, semaphores, queues) to MCU control designs.

9.14
CGPA Performance
Top-tier academic marks across digital logic, signals, and systems course parameters.
300+
LeetCode DSA
Developed strong computational structures and algorithmic problem-solving logic.
GATE
ECE Qualified
Validated core proficiency in electronic devices and communications.
Embedded C SystemVerilog FreeRTOS FPGA Design UART/SPI/I2C ModelSim Logic Analyzer Data Structures MQTT Python Scripting
Core
Languages, kernels, and paradigms I apply to write robust, real-time code.
C
C++
Embedded C
Python
FreeRTOS
Data Structures
SystemVerilog
Embedded & Hardware
Platforms, hardware modules, and telemetry systems.
ESP32
Arduino Uno
Jetson Nano
Sensor Integration
Oscilloscope
Telemetry
Protocols & RTL
Hardware buses, synthesizers, and design packages.
UART, SPI, I²C
CAN Bus
MQTT (IoT)
ModelSim
Intel Quartus
Git

Projects

AI Power Touch-Free Alert System

Embedded & IoT
July 2025 - Dec 2025 · Embedded sensor network with MQTT telemetry

Integrated ESP32 sensor nodes with MQTT communication and OpenCV blink detection on a Jetson Nano. Programmed low-latency (<2s) telemetry and automated alert orchestration.

Highlights

Designed the alert system to reliably recognize presence and trigger remote data capture across distributed endpoints. Reduced manual inspection cycles by automating the sensor pipeline.

ESP32 Jetson Nano MQTT OpenCV Python
2s
Latency
Delivered sub-2-second telemetry feedback for the alert pipeline.
MQTT
Protocol
Used MQTT for robust sensor-to-cloud data streaming and remote status updates.

Avionics Primary Flight Display

Embedded Systems
Jul 2024 · Real-time flight instrumentation and UART telemetry

Built a real-time data acquisition pipeline for flight parameters, with UART-based serialization and noise filtering to preserve signal integrity.

Value Delivered

Created a robust telemetry path from sensor data through the display stack, enabling dependable status reporting in harsh electrical environments.

C++ I2C UART Python Signal Processing
UART , I2C
Interface
Maintained reliable serial transfer across avionics hardware and flight display modules.
Real-Time
Telemetry
Processed live flight data with low jitter and deterministic update cadence.

Lossless JPEG-LS FPGA Compression

FPGA & RTL Design
May 2024 · SystemVerilog compression pipeline with timing closure

Implemented an FPGA-based image compression core using SystemVerilog, resolving CDC and timing closure to hit a stable 103 MHz operating point.

Design Focus

Built a scalable RTL pipeline with predictable throughput and image fidelity guarantees, then verified behavior through simulation and synthesis reports.

SystemVerilog Quartus Prime ModelSim RTL
103 MHz
Clock Rate
Achieved stable timing closure for the JPEG-LS compression core.
Lossless
Compression
Preserved image data integrity while reducing bandwidth for the FPGA pipeline.